- Product
- Digital ICs

Categories

Sign Up for Our Newsletter!

- Number of Bits: 4
- Operating Supply Voltage: 5V
- Provides 16 arithmetic operations: add, subtract, compare, double, plus twelve other arithmetic operations
- Provides all 16 logic operations of two variables: exclusive- OR, compare, AND, NAND, OR, NOR, plus ten other logic operations
- High Level Output Current: - 0.4 mA
- Low Level Output Current: 8 mA
- Propagation Delay Time: 33 ns
- Supply Voltage - Max: 5.5 V
- Supply Voltage - Min: 4.5 V
- Minimum Operating Temperature: 0°C
- Maximum Operating Temperature: + 70°C
- Package / Case: DIP-24
- Height: 4.06 mm
- Length: 32.26 mm
- Number of Circuits: 1
- Width: 13.71 mm
- Brand: ON Semiconductor / Fairchild
- Logic Family: 74LS181
- Mounting Style: Through Hole

This is a 4-bit Arithmetic Logic Unit (ALU) which can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations.

s Provides 16 arithmetic operations: add, subtract, compare, double, plus twelve other arithmetic operations s Provides all 16 logic operations of two variables: exclusive-OR, compare, AND, NAND, OR, NOR, plus ten other logic operations s Full lookahead for high-speed arithmetic operation on long words.

Order Number DM74LS181N Package Number N24A Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600 Wide.

Description Operand Inputs (Active LOW) Operand Inputs (Active LOW) Function Select Inputs Mode Control Input Carry Input Function Outputs (Active LOW) Comparator Output Carry Generate Output (Active LOW) Carry Propagate Output (Active LOW) Carry Output

The 4-bit high-speed parallel Arithmetic Logic Unit (ALU) Controlled by the four Function Select inputs (S0S3) and the Mode Control input (M), it can perform all the 16 possible logic operations or 16 different arithmetic operations on active HIGH or active LOW operands. The Function Table lists these operations When the Mode Control input (M) is HIGH, all internal carries are inhibited and the device performs logic operations on the individual bits as listed. When the Mode Control input is LOW, the carries are enabled and the device performs arithmetic operations on the two 4-bit words. The device incorporates full internal carry lookahead and provides for either ripple carry between devices using the Cn+4 output, or for carry lookahead between packages using the signals P (Carry Propagate) and G (Carry Generate). In the ADD mode, P indicates that 15 or more, while G indicates that 16 or more. In the SUBTRACT mode, P indicates that F is zero or less, while G indicates that F is less than zero. P and G are not affected by carry in. When speed requirements are not stringent, it can be used in a simple ripple carry mode by connecting the Carry output (Cn+4) signal to the Carry input (Cn) of the next unit. For high-speed operation the device is used in conjunction with the or 93S42 carry lookahead circuit. One carry lookahead package is required for each group of four DM74LS181 devices. Carry lookahead can be provided at various levels and offers high-speed capability over extremely long word lengths. The = B output from the device goes HIGH when all four F outputs are HIGH and can be used to indicate logic equivalence over four bits when the unit is in the subtract mode. The = B output is open-collector and can be wired AND with other = B outputs to give a comparison for more than four bits. The = B signal can also be used with the Cn+4 signal to indicate > B and < B>

Mode Select Inputs Logic S0 AB A+B Logic 1 A+B B AB A+B AB B A+B Logic = H) Active LOW Operands & Fn Outputs Arithmetic (Note = L) (Cn L) A minus 1 AB minus 1 AB minus 1 minus 1 A plus B) AB plus B) A minus B minus 1 A+B A plus B) A plus B AB plus + B) A+B A plus A (Note 1) AB plus A AB minus A A+B AB Logic B AB A+B B AB Logic 1 A+B A Logic H) A A+B minus 1 A plus + B) plus AB A minus B minus 1 AB minus 1 A plus AB A plus + B) plus AB minus 1 A plus A (Note + B) plus + B) plus A minus 1 Active HIGH Operands & Fn Outputs Arithmetic (Note = L) (Cn = H)

Note 1: Each bit is shifted to the next most significant position. Note 2: Arithmetic operations expressed in 2s complement notation.